1. Field of the Invention
The present invention relates to an automatic fine-tuning control voltage generating circuit. More particularly, the present invention relates to an automatic fine-tuning control voltage generating circuit having a level shift circuit for shifting, toward a lower level, a non-signal-time level of an automatic fine-tuning control voltage output from an integrated circuit for an intermediate frequency to which an intermediate video frequency signal which is filtered by a SAW (surface acoustic wave) filter is supplied.
2. Description of the Related Art
Hitherto, in a television receiver, etc., comprising an electronic tuner, when the electronic tuner is automatically preset-tuned or automatically search-tuned to a broadcasting signal of a predetermined receiving frequency by using a phase-locked loop (PLL), an automatic fine-tuning control (AFT) voltage which is output from an integrated circuit for an intermediate frequency (IF IC) is used. Also, when drift occurs at a tuning point due to ambient temperature variations, etc., an automatic fine-tuning control (AFT) voltage is also used in a similar manner.
FIGS. 5A, 5B, and 5C are illustrations showing an example of a signal waveform, a voltage waveform, and a frequency variation state in each section of an electronic tuner when preset automatic tuning is performed in the electronic tuner. FIG. 5A shows a horizontal synchronization signal waveform detected from a received signal. FIG. 5B shows an AFT voice waveform output from an IF IC. FIG. 5C shows an oscillation frequency variation state of a voltage controlled oscillator (VCO), within a PLL, for generating a local oscillation signal.
When preset automatic tuning is performed in the electronic tuner, initially, as shown in FIG. 5C, sweeping of an oscillation frequency is performed by sequentially varying, in a stepped manner, the oscillation frequency of a VCO, within a PLL, for generating a local oscillation signal in units of two steps, for example, in units of (62.5xc3x972) kHz, from lower frequencies (or higher frequencies) every fixed time period A (for example, 200 ms). During the sweeping of this oscillation frequency, as shown in FIG. 5A, a horizontal synchronization signal is detected from a received signal. Next, when the horizontal synchronization signal is detected, as shown in FIG. 5B, the lower level of an S-shaped curve of an AFT voltage output from the IF IC is detected while this horizontal synchronization signal is being monitored. When the lower level of the S-shaped curve of the AFT voltage is detected, the sweeping of the oscillation frequency of the VCO for generating a local oscillation signal is varied, in a direction opposite to that thus far, by one step, for example, by 62.5 kHz. Then, as shown in FIG. 5C, the oscillation frequency of the VCO for generating a local oscillation signal obtained at this time is taken to represent the preset automatic tuning point, and this is stored in a memory, terminating the preset automatic tuning.
While the electronic tuner is operating, if the horizontal synchronization signal cannot be detected, or if the higher level of the S-shaped curve of the AFT voltage which is output from the IF IC exceeds an upper-limit value, for example, 3.0 MHz, an operation for detecting the horizontal synchronization signal is performed again in the electronic tuner.
Next, FIG. 3 is a block diagram showing an example of the construction of a known AFT voltage generating circuit used in an electronic tuner.
FIGS. 4A and 4B are illustrations showing a signal waveform and a voltage waveform, respectively, of each section in the AFT voltage generating circuit shown in FIG. 3. FIG. 4A is a waveform chart of a filtered intermediate video frequency signal. FIG. 4B is a waveform chart of an output AFT voltage.
As shown in FIG. 3, the AFT voltage generating circuit comprises a surface-acoustic-wave (SAW) filter 31, an integrated circuit (IF IC) 32 for an intermediate frequency, a bias setting circuit 33, an intermediate video frequency signal input terminal 34, an AFT voltage using circuit (microcomputer) 35, and a power-supply terminal 36. The IF IC 32 comprises AFT voltage output transistors 321 and 322, and an output buffer resistor 323. The bias setting circuit 33 comprises series voltage-division resistors 331 and 332 having the same resistance values, and an output buffer resistor 333.
The SAW filter 31 is connected at its input end to the intermediate video frequency signal input terminal 34 and is connected at its output end to the input end of the IF IC 32. The IF IC 32 is connected at its AFT voltage output end to the input terminal of the bias setting circuit 33. Inside the IF IC 32, the AFT voltage output transistors 321 and 322 are connected in series between the power-supply terminal 36 and a ground, and the output buffer resistor 323 is connected between the connection point of the two output transistors 321 and 322 and the AFT voltage output end of the IF IC 32. The bias setting circuit 33 is connected at its output end to the input end of the AFT voltage using circuit 35. Inside the bias setting circuit 33, the series voltage-division resistors 331 and 332 are connected between the power-supply terminal 36 and a ground, the connection point of the two resistors 331 and 332 is connected to the input end, and the output buffer resistor 333 is connected between the input end and the output end.
The known AFT voltage generating circuit constructed as described above operates in the following manner.
When an intermediate video frequency signal is input to the intermediate video frequency signal input terminal 34, the intermediate video frequency signal is filtered by the SAW filter 31, and a filtered intermediate video frequency signal, such as that shown in FIG. 4A, is output from the SAW filter 31. The filtered intermediate video frequency signal is detected by the IF IC 32 and an AFT voltage is formed thereby, and the AFT voltage is taken out from the connection point of the two output transistors 321 and 322 through the output buffer resistor 323. The taken-out AFT voltage is supplied to the bias setting circuit 33 whereby, as shown in FIG. 4B, the non-signal-time level is set to an intermediate level of a supplied DC voltage of the power-supply terminal 36, for example, 2.5 V, after which the level is supplied to the using circuit. This AFT voltage is set so that the higher level is the supplied DC voltage of the power-supply terminal 36, for example, a voltage of 3.5 V to 5 V, and the lower level a voltage of 1.5 V or closer to the ground voltage, 0 V.
In this case, as shown in FIG. 4A, the frequency characteristics of the intermediate video frequency signal which is filtered by the SAW filter 31 is such that, since a vestigial sideband system is employed in television broadcasting signals, the frequency band which is higher than the video carrier-wave frequency P is considerably narrower than the frequency band which is lower than the video carrier-wave frequency P. In correspondence with this, as shown in FIG. 4B, the S-shaped curve of the AFT voltage taken out from the bias setting circuit 33 reaches a high level for a relatively long period when the frequency of the frequency band which is lower than the video carrier-wave frequency P is swept. When, in contrast, the frequency of the frequency band higher than the video carrier-wave frequency P is swept, the S-shaped curve of the AFT voltage reaches a lower level for a short period.
In the known AFT voltage generating circuit, since the period at the lower level is much shorter than the period at the higher level in the S-shaped curve of the output AFT voltage, when preset automatic tuning is to be performed by sweeping a local oscillation signal frequency in the VCO within the PLL of the electronic tuner, problems arise in that detection of a lower level in which the period is short cannot be performed, thus the lower level point is passed without being detected, and the position of the low level point is not be stored in a memory. Also, the lower level point may be detected at an incorrect point, the detection point is stored in the memory, and thereafter, preset automatic tuning cannot be performed.
In this case, the manufacturer of the general-purpose IF IC 32 is requested to change a part of the circuit design so that the period at a lower level, of the S-shaped curve of the output AFT voltage is increased. However, when the circuit design of the general-purpose IF IC 32 is changed, new problems arise, for example, the manufacturing cost of the general-purpose IF IC 32 is increased, the general-purpose IF IC 32 may be unavailable, etc.
The present invention overcomes such problems. An object of the present invention is to provide an AFT voltage generating circuit, in which a general-purpose IF IC is used, which is capable of easily detecting a lower level point in a simple manner without increasing the manufacturing cost.
To achieve the above-mentioned object, the AFT voltage generating circuit in accordance with the present invention has a surface-acoustic-wave filter for filtering an intermediate video frequency signal; an IF IC for generating an AFT voltage in response to the filtered intermediate video frequency signal; and a level shift circuit for shifting the non-signal-time level of the AFT voltage toward a direction in which the level is lower than an intermediate level.
According to the above-described construction, a level shift circuit is used to shift the non-signal-time level of an AFT voltage which is output from an IF IC toward a direction in which the level is lower than an intermediate level, the shifted non-signal-time level is handled as a lower level, and the period of the low level is increased substantially, making it possible to reliably detect the lower level point.
In an aspect of the present invention, the AFT voltage generating circuit comprises a surface-acoustic-wave filter for filtering an intermediate video frequency signal; an IF IC, connected to the surface-acoustic-wave filter, for detecting the filtered intermediate video frequency signal and for generating an AFT voltage; and a level shift circuit, connected to the IF IC, for shifting the non-signal-time level of the AFT voltage generated by the IF IC toward a direction in which the level is lower than an intermediate level.
In an example of an aspect of the present invention, in the AFT voltage generating circuit, a level shift circuit includes series voltage-division resistors for dividing a power voltage unevenly, and an AFT voltage generated by an IF IC is supplied to the connection point of the series voltage-division resistors.
According to these aspects of the present invention, a level shift circuit is connected to an IF IC, and an AFT voltage output from the IF IC is supplied to the level shift circuit, causing the non-signal-time level of the AFT voltage to be shifted toward a direction in which the level is lower than an intermediate level, and this shifted non-signal-time level is handled in a manner similar to that for the lower level. This makes it possible to add the period of the shifted non-signal-time level to the period in which the lower level is short in order to substantially increase the period for the lower level. As a result of the period of the lower level of the AFT voltage being increased, when a local oscillation signal frequency is swept to perform preset automatic tuning, it is possible to reliably detect the lower level point and to store the position of the lower level point in a memory. As a result, it is possible to avoid entering a situation in which preset automatic tuning cannot be performed.
Furthermore, according to these aspects of the present invention, when forming an AFT voltage generating circuit, only a general-purpose IF IC and a level shift circuit are required. Thus, the construction is simple, and the manufacturing cost is less.